1. Field of the Invention
This invention relates to logic circuits and, more particularly, to techniques for making interrupt signals insensitive to spurious input signals and ground spikes.
2. Prior Art
An interrupt condition in a computer system is a suspension of a process, such as the execution of a computer program. An interrupt condition normally is caused by an event external to that process and the suspension of the process is performed in such a way that the process can be resumed. A synchronous interrupt operation for a computer system is an operation where an external interrupt signal is processed through a series of latches to synchronize the interrupt to the timing of the computer system. An interrupt signal commonly goes from a ONE level to a ZERO level to indicate the presence of an interrupt condition.
A problem to be solved is how to make input signal lines for an interrupt signal insensitive to voltage spikes on the input signal line or ground spikes on the ground lines. A signal with a TTL minimum ONE level of 2.0 volts can be detected as a ZERO level by an input circuit with a high enough ground spike. Ground spikes as high as 2.0 volts and as wide as 30 nanoseconds have been observed, sufficient to falsely trigger an interrupt signal line. Noisy circuit boards can also produce negative-going spikes on the input signal lines to integrated-circuit computer chips on the circuit board. The result of these spikes on the input and ground lines is to erroneously indicate to a computer chip that it is to be interrupted.
The synchronizing logic circuitry for a conventional interrupt signal synchronizing system typically is sensitive to level changes only. This does not prevent a short-duration GROUND SPIKE signal from being interpreted and processed as a valid interrupt signal.
One technique for dealing with ground spikes is to raise the minimum ONE level for the circuit to a level which is above the standard 2.0 volt level for TTL circuits. However, this makes the circuit incompatible with conventional TTL standards.
Consequently, the need has arisen for a technique to protect input circuits for synchronizing interrupt signals from being falsely triggered by spikes on their input signal lines and ground lines.